1. Field of the Invention
The present invention relates generally to the packaging of semiconductor die and, more particularly, to a die-wafer packaging solution including multichip packages, stacked die arrangements and methods related to the fabrication thereof.
2. State of the Art
Higher performance, lower cost, increased miniaturization of components, and greater packaging density of integrated circuits are ongoing goals of the computer industry. Increased integrated circuit density is limited, in large part, by the space or “real estate” available for mounting die on a substrate such as a printed circuit board.
Conventional lead frame designs have been used in the past in the fabrication of multichip packages, but such designs inherently limit package density for a given die size because the die-attach paddle of the lead frame is conventionally larger than the die to which it is bonded. Generally speaking, the larger the die, the less space that remains around the periphery of the die-bonding pad for wire bonding. Furthermore, the wire bonding pads on a conventional lead frame provide anchorage for the leads when the leads and the die are encapsulated in plastic. Therefore, as die size is increased in relation to a given package size, there is a corresponding reduction in the space along the sides of the package for the encapsulating plastic which joins the top and bottom of the plastic body at the mold part line and anchors the leads. Thus, as the leads and encapsulant are subjected to the normal stresses of subsequent forming and assembly operations, the encapsulating plastic may crack, compromising package integrity and substantially increasing the probability of premature device failure.
More recently, chip-on-wafer or chip-on-chip designs have been implemented, using both conventional wire bonding techniques as well as some flip-chip fabrication techniques, in order to increase package density and functionality. Such packages may include the interconnection of different chips used for specific functions within the package. For example, memory chips, such as dynamic random access memory (DRAM) and/or flash memory chips, may be combined with one or more types of logic circuit chips to provide an integrated system.
Such packages may be manufactured so as to provide a package with a relatively small footprint. Generally, such packages consume less surface area on a substrate than two separately packaged semiconductor dice coupled to the same substrate. Additionally, integration of more components into an electronic system generally reduces the cost of the system as well as the overall complexity thereof.
One attempt to provide such a multichip package includes U.S. Pat. No. 6,392,304, issued May 21, 2002, to Butler. The Butler patent discloses a multichip integrated circuit including a memory chip operatively coupled with a nonmemory chip. Butler teaches that there are reduced levels of capacitance and inductance due to the chip-on-chip interface and, therefore, the resultant integrated circuit can be operated at increased speeds and at reduced levels of power consumption. However, the final package taught by Butler appears to require wire bonds from at least one of the chips to an associated lead frame. As noted above, such an arrangement generally consumes valuable real estate on a carrier substrate or other device to which the package is ultimately mounted. Furthermore, the use of a lead frame and wire bonds may limit the speed of the device for some configurations.
Multichip packages not incorporating lead frames or wire bond connections are shown in U.S. Pat. No. 6,204,562, issued Mar. 20, 2001, to Ho et al., and U.S. Pat. No. 6,084,308, issued Jul. 4, 2000, to Kelkar et al.
The Ho patent discloses a package including a first die coupled with a second die in a face-to-face arrangement using flip-chip techniques. The input/output (I/O) connections of the first die are coupled with a redistribution layer formed between the two dice. Conductive bumps are formed on the face of the second die around the periphery of the first die and function as I/O connections for the resultant package. A molding material may be disposed about the first die and the conductive bumps to form the resulting package. While providing a multichip package using flip-chip techniques, the requirement of the package I/O connections being located about the periphery of the package outward of the first die's periphery may limit the flexibility in the placement and design of the resulting array of package I/O connections.
The Kelkar patent discloses a chip-on-chip integrated circuit package which includes a first die disposed within a cavity of a substrate. A second die is mounted over the top of the first die and is electrically coupled to I/O connections of the first die as well as to bond pads on the substrate by way of solder balls disposed therebetween. The bond pads of the substrate are electrically coupled to electrical contacts, such as conductive bumps or pins, formed on an opposing surface of the substrate. The first die is attached to the substrate using a die attach material which exhibits a reflow temperature which is substantially the same as the reflow temperature of the solder balls disposed between the second die and the substrate and first die. While allowing more flexibility in configuration and design of the package I/O connections than the package disclosed by Ho, the Kelkar package requires additional materials and procedures in the fabrication thereof. For example, the Kelkar package requires an additional substrate having electrical connections on opposing surfaces thereof as well as connecting circuitry formed between the electrical connections of both surfaces. Furthermore, the resulting package appears to be significantly larger than just the continuation of the two dice because of the requirements of the additional substrate.
Thus, there is a continued desire to provide wafer-level packages providing improved density and functionality while reducing the cost to manufacture and simplifying the associated fabrication processes.